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PIC18F66K80 FAMILY

DS39977F-page 126

2010-2012 Microchip Technology Inc.

6.6

Data Memory and the Extended

Instruction Set

Enabling the PIC18 extended instruction set (XINST

Configuration bit = 1) significantly changes certain

aspects of data memory and its addressing. Using the

Access Bank for many of the core PIC18 instructions

introduces a new addressing mode for the data memory

space. This mode also alters the behavior of Indirect

Addressing using FSR2 and its associated operands.

What does not change is just as important. The size of

the data memory space is unchanged, as well as its

linear addressing. The SFR map remains the same.

Core PIC18 instructions can still operate in both Direct

and Indirect Addressing mode. Inherent and literal

instructions do not change at all. Indirect Addressing

with FSR0 and FSR1 also remains unchanged.

6.6.1

INDEXED ADDRESSING WITH

LITERAL OFFSET

Enabling the PIC18 extended instruction set changes

the behavior of Indirect Addressing using the FSR2

proper conditions, instructions that use the Access

Bank – that is, most bit-oriented and byte-oriented

instructions – can invoke a form of Indexed Addressing

using an offset specified in the instruction. This special

addressing mode is known as Indexed Addressing with

Literal Offset or the Indexed Literal Offset mode.

When using the extended instruction set, this

addressing mode requires the following:

Use of the Access Bank (‘a’ = 0)

A file address argument that is less than or equal

to 5Fh

Under these conditions, the file address of the

instruction is not interpreted as the lower byte of an

address (used with the BSR in Direct Addressing) or as

an 8-bit address in the Access Bank. Instead, the value

is interpreted as an offset value to an Address Pointer

specified by FSR2. The offset and the contents of FSR2

are added to obtain the target address of the operation.

6.6.2

INSTRUCTIONS AFFECTED BY

INDEXED LITERAL OFFSET MODE

Any of the core PIC18 instructions that can use Direct

Addressing are potentially affected by the Indexed

Literal Offset Addressing mode. This includes all

byte-oriented and bit-oriented instructions, or almost

one-half of the standard PIC18 instruction set. Instruc-

tions that only use Inherent or Literal Addressing

modes are unaffected.

Additionally, byte-oriented and bit-oriented instructions

are not affected if they do not use the Access Bank

(Access RAM bit = 1), or include a file address of 60h

or above. Instructions meeting these criteria will

continue to execute as before. A comparison of the dif-

ferent possible addressing modes when the extended

instruction set is enabled is shown in Figure 6-9.

Those who desire to use byte-oriented or bit-oriented

instructions in the Indexed Literal Offset mode should

note the changes to assembler syntax for this mode.

This is described in more detail in Section 29.2.1

“Extended Instruction Syntax”

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